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Status Functionality already exists
Workspace IBM Z and LinuxONE Systems Hardware
Categories General/Miscellaneous
Created by Guest
Created on Jul 16, 2024

RELATED IDEAS

Suggest BCI instruction, I4 field to branch forward up to 32 bytes without clearing cache.

A variation of the BCR instruction.  Instead or the R destination field, the I4 Immediate 4 bit field would be 0 skip 0 or 2 bytes after instruction, 2 skip 2 or 4 bytes after instruction, ..., 15 skip 30 or 32 bytes after instruction.  The miniscule range might allow the cache to be kept despite it being a branch instruction.

Idea priority Low
  • Guest
    Reply
    |     Nov 19, 2024
    In modern CPUs the behavior of traditional branches, with branch prediction, provides all of the performance benefits of the suggested request.
  • Guest
    Reply
    |     Oct 19, 2024

    Without a branch, the processor is decoding and preprocessing several instructions.  A normal branch discards the next instructions already partially processed.  This instruction could jump forward up to 32 bytes of instructions, but the goal would be to use the partially processed instructions if the branch fail, and discard if the branch succeeds.  

    Could be implemented using the existing Branch Relative with a immediate forward branch under the limit the processor can handle, or use the suggested 2 byte instruction that does not allow more than 4 bits to specify no more than 32 bytes forward.
     

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